JPS6325714B2 - - Google Patents
Info
- Publication number
- JPS6325714B2 JPS6325714B2 JP53013427A JP1342778A JPS6325714B2 JP S6325714 B2 JPS6325714 B2 JP S6325714B2 JP 53013427 A JP53013427 A JP 53013427A JP 1342778 A JP1342778 A JP 1342778A JP S6325714 B2 JPS6325714 B2 JP S6325714B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- well
- type
- mos
- fet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/858—Complementary IGFETs, e.g. CMOS comprising a P-type well but not an N-type well
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1342778A JPS54107278A (en) | 1978-02-10 | 1978-02-10 | Semiconductor device |
DE2904812A DE2904812C2 (de) | 1978-02-10 | 1979-02-08 | Halbleiterspeichereinrichtung in MOS-Technologie |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1342778A JPS54107278A (en) | 1978-02-10 | 1978-02-10 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS54107278A JPS54107278A (en) | 1979-08-22 |
JPS6325714B2 true JPS6325714B2 (en]) | 1988-05-26 |
Family
ID=11832832
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1342778A Granted JPS54107278A (en) | 1978-02-10 | 1978-02-10 | Semiconductor device |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPS54107278A (en]) |
DE (1) | DE2904812C2 (en]) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0420550U (en]) * | 1990-06-11 | 1992-02-20 |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4442529A (en) * | 1981-02-04 | 1984-04-10 | At&T Bell Telephone Laboratories, Incorporated | Power supply rejection characteristics of CMOS circuits |
JPS57186289A (en) * | 1981-05-13 | 1982-11-16 | Hitachi Ltd | Semiconductor memory |
JPS58125872A (ja) * | 1982-01-21 | 1983-07-27 | Nec Corp | 電荷結合素子 |
JPS5922359A (ja) * | 1982-07-29 | 1984-02-04 | Nec Corp | 集積化半導体記憶装置 |
US4704678A (en) * | 1982-11-26 | 1987-11-03 | Inmos Limited | Function set for a microcomputer |
JPS6073259U (ja) * | 1983-10-26 | 1985-05-23 | 三洋電機株式会社 | ダイナミツクrom |
JPS61214448A (ja) * | 1985-03-19 | 1986-09-24 | Fujitsu Ltd | 半導体集積回路 |
JPS6251251A (ja) * | 1985-08-30 | 1987-03-05 | Toshiba Corp | スタテイツク型ランダムアクセスメモリ |
JPS6251252A (ja) * | 1985-08-30 | 1987-03-05 | Toshiba Corp | ランダムアクセスメモリ |
US5196910A (en) * | 1987-04-24 | 1993-03-23 | Hitachi, Ltd. | Semiconductor memory device with recessed array region |
USRE38296E1 (en) * | 1987-04-24 | 2003-11-04 | Hitachi, Ltd. | Semiconductor memory device with recessed array region |
KR910009425B1 (ko) * | 1987-09-24 | 1991-11-15 | 가부시기가이샤 히다찌세이사꾸쇼 | 반도체 메모리 집적회로 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3733591A (en) * | 1970-06-24 | 1973-05-15 | Westinghouse Electric Corp | Non-volatile memory element |
-
1978
- 1978-02-10 JP JP1342778A patent/JPS54107278A/ja active Granted
-
1979
- 1979-02-08 DE DE2904812A patent/DE2904812C2/de not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0420550U (en]) * | 1990-06-11 | 1992-02-20 |
Also Published As
Publication number | Publication date |
---|---|
DE2904812A1 (de) | 1979-08-16 |
DE2904812C2 (de) | 1986-05-15 |
JPS54107278A (en) | 1979-08-22 |
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